Shared IRQs question

[Sobakevich]

Hi, I'll use Asus Sabertooth MB for FreeNAS. It has 6 SATA connectors, numbered 1 to 6 (not 0-5).
While reading board's manual I found this table stating that SATA#0 and SMBus controller share an IRQ.
I made a test setup with 2 HDDs in SATA1 and SATA2 connectors, works OK for two days.
I plan to utilise all 6 connectors at first stage, can I do it safely or should I install PCIe HBA controller to avoid that IRQ share?

 

[wl714]

That describes the situation only if system runs in PIC mode. Multi cores/threads x86 arch system runs in APIC or XAPIC mode where device generates interrupt request by sending message directly to procerssor's system bus (not by raising the interrupt request input signal of the interrupt controller as in the PIC mode). And even in PIC mode, sharing of an IR input signal line amount PCI devices are perfectly ok. In PIC mode, there is really just one physical line connected to CPU's INTR pin (from the master interrupt controller's output) to signal the CPU that an interrupt has happened. It would be the OS's job to read IRR register of the interrupt controller to determine which interrupt signal line triggered the CPU's interrupt. Then OS runs all device's ISR (device driver) registered for that IRQ#. Device didn't generate the interrupt will quickly exit its own ISR (in a few bus cycles), and device that generates the interrupt get serviced in its ISR. Anyway, you can run all devices safely. PCI irq sharing is not a concern.